Job Id: 1034
Top 5 Required Skills
1. US citizen or green card holder required because of export control limitation on who can join N2K role list role.crd.voyager.subthz.layout that controls access to the chip top layout database (ECCN – 3A001.b.2.h)
2. 4+ years of experience using layout design and verification tools (e.g., cadence, calibreLVS, calibreDRC)
3. Familiarity with CMOS-SOI processes, especially Global Foundries 45RFSOI
4. Able to operate efficienctly in a Linux environment, knowledge of basic UNIX/Linux commands
5. Ability to concise summarize and explain complex technical issues
Technologies
• CMOS, 45RFSOI
• SOI (Silicon on insulator)
Keywords
• RFIC Layout
• CMOS-SOI
• 45RFSOI
Education Requirement
• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
OR
• Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
OR
• High School diploma or equivalent and 8+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
Required Years of Experience
• 5 to 7 years
Job Description Overview
•Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal stakeholders to provide updates and resolve issues