Engineer Staff 5020598

Website ManpowerWest Manpower San Diego

Jobs in San Diego and surroundings areas

Job Id: 1008
Top 5 Required Skills
1.??? 2+ years of ASIC design verification or related work experience
2.??? Strong troubleshooting skills across embedded systems disciplines (digital RTL Firmware analog behavioral models)
3.? Expert-level System Verilog Programming
4.??? Advanced UVM/SV(Universal Verification Methodology using System Verilog)
5.?? Experience with Python or Perl Scripting


Required Education:.?

Bachelor's degree in Electrical Engineering with 5+ years of analog or mixed-signal integrated circuit design experience and 4+ years of ASIC design verification or related work experience.
Master's degree in Electrical Engineering or related field and 4+ years of ASIC design verification or related work experience.
PhD in Electrical Engineering or related field and 2+ years of ASIC design verification or related work experience.

Required Years of Experience:

Dependent upon Education Requirement

Physical Requirements (Lifting outdoor work travel): If “yes” please specify max weight for each category:
Push Max Weight Limit = N/A
Pull Max Weight Limit = N/A
Lift Max Weight Limit = N/A
Driving Requirements: Please complete below:?
Are their driving responsibilities no matter how minimal with this role?????
If yes how many hours of driving per week?? NO

Key Words:??

Job Description:

Principal Duties and Responsibilities:
• Uses tools/applications (i.e. Cadence ADE MATLAB etc.) to execute advanced architecture and design of complex blocks module or chip makes suggestions for design specifications and requirements.
• Owns the verification strategies of PMICs reviews the strategies of more junior team members and develops strategies for a block module or chip.
• Guides layout engineers independently to generate the layout of circuits and conduct physical verification of the layout.
• Runs advanced functionality checks on a chip or module to ensure design specifications are met; makes recommendations to leadership when specifications are not met.
• Interprets the results of highly complex performance checks and reports them to team lead.
• Documents complex details about materials components and functionality for a PMIC and/or PMU while being mindful of potential compatibility safety and compliance issues; assists less experienced engineers in their documentation of these details.
• Displays deep knowledge in a specific area; acquires advanced knowledge of industry trends competitor products and advances in the Power Management field from publicly available information; shares knowledge with others on team and helps less experienced engineers understand and apply advanced concepts.
• Contributes to conversations to generate new ideas for next generation initiatives; provides recommendations for new directions to explore.
* Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches.
* Digital Verification aspects include all stages of the verification process from test planning UVM-compliant test-bench architecture constrained-random stimulus creation score-boarding and coverage closure.
* Work includes verification of digital and mixed-signals IPs and exposure to analog behavioral models is a plus.
* Work includes debugging of complex embedded systems including SOCs firmware embedded sequencers.
* Position includes IP or chip DV ownership including task planning and project risk mitigation.
* Work in a dynamic team environment with aggressive schedule towards metrics-based high quality target.

Leave a Reply